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<title> Research Interests </title>
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<h1> Dean Tullsen's Research Interests </h1>
Computer architecture, caches, superscalar processors, multithreaded
processors, superscalar multithreaded processors ...
<h2> Bibliography </h2>
D.M. Tullsen, S.J. Eggers, J.S. Emer, H.M. Levy, J.L. Lo, and R.L. Stamm, 
<A HREF = "ISCA96.ps">Exploiting Choice:  Instruction Fetch and Issue on an
Implementable Simultaneous Multithreading Processor</A>, In 
23rd Annual International Symposium on Computer Architecture, May, 1996

(see <A HREF = "ISCA96abstract.html">abstract</a>)

<P>
D.M. Tullsen, S.J. Eggers, and H.M. Levy, <A HREF = "ISCA95.ps">Simultaneous
Multithreading:   Maximizing On-Chip Parallelism</A>, In 22nd Annual 
International Symposium on Computer Architecture, June, 1995

(see <A HREF = "ISCA95abstract.html">abstract</a>)

<P>
D.M. Tullsen, S.J. Eggers, <A HREF = "ACMTOCS.ps">Effective Cache
Prefetching on Bus-Based Multiprocessors</A>, ACM Transactions
on Computer Systems, pp. 57-88, February, 1995

(see <A HREF = "TOCSabstract.html">abstract</a>)
<P>
D.M. Tullsen, S.J. Eggers, 
<A HREF = "ISCA93.ps">Limitations of Cache Prefetching on a Bus-Based 
Multiprocessor</A>, 
In 20th Annual International Symposium on Computer Architecture, pp 278-288,
1993

(see <A HREF = "ISCA93abstract.html">abstract</a>)
<P>
D.M. Tullsen, M.D. Ercegovac, Design and VLSI Implementation of an
Online Algorithm, Real Time Signal Processing IX, August, 1988

